Updated parity and slaveid, change accordingly

This commit is contained in:
Warky 2024-11-21 18:14:12 +02:00
parent 00578ada96
commit abe3be71f0

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@ -15,8 +15,10 @@
#define DE_RE_PIN 4 #define DE_RE_PIN 4
#define RX_PIN 8 // SoftwareSerial RX pin #define RX_PIN 8 // SoftwareSerial RX pin
#define TX_PIN 7 // SoftwareSerial TX pin #define TX_PIN 7 // SoftwareSerial TX pin
#define SLAVE_ID 101 #define SLAVE_ID 1 //From 1 10 (Normally 1)
#define SERIAL_BAUDRATE 9600 #define SERIAL_BAUDRATE 9600
#define MODBUS_SERIAL_BAUDRATE 19200
#define SERIAL_CONFIG SERIAL_8E1
#define LED_A_PID 3 #define LED_A_PID 3
#define LED_B_PID 5 #define LED_B_PID 5
@ -110,7 +112,7 @@ void setup()
pinMode(DE_RE_PIN, OUTPUT); pinMode(DE_RE_PIN, OUTPUT);
digitalWrite(DE_RE_PIN, LOW); // Set to LOW for receiving mode initially digitalWrite(DE_RE_PIN, LOW); // Set to LOW for receiving mode initially
modbusSerial.begin(SERIAL_BAUDRATE); modbusSerial.begin(MODBUS_SERIAL_BAUDRATE);
node.begin(SLAVE_ID, modbusSerial); node.begin(SLAVE_ID, modbusSerial);
node.preTransmission(preTransmission); node.preTransmission(preTransmission);
@ -232,9 +234,9 @@ void loop()
const uint8_t regtype = pgm_read_word(&registers[i].regtype); const uint8_t regtype = pgm_read_word(&registers[i].regtype);
if (regaddr > 0 && regtype <= 3) { // Only read direct registers if (regaddr > 0 && regtype <= 3) { // Only read direct registers
delay(25); delay(10);
uint8_t result = node.readHoldingRegisters(regaddr - 1, 2); uint8_t result = node.readHoldingRegisters(regaddr - 1, 2);
delay(25); delay(10);
if (result == node.ku8MBSuccess) { if (result == node.ku8MBSuccess) {
switch(regtype) { switch(regtype) {